Synthesis of Ternary Reversible Circuits based on Permutation Cycles

Abstract

The main motivation to use ternary logic systems is that the amount of information per circuit line is higher as compared to the corresponding binary logic representation, thereby leading to more compact circuit realizations. This is particularly attractive for quantum computing as qutrits are expensive resources and minimizing their number is one of the main objectives during synthesis process. Hence, the present work exploits the ternary logic concept and synthesizes the ternary reversible circuits using a cycle-based approach. A permutation representing the ternary reversible specification of a given function in given as an input. The permutation cycles are obtained from the input and then it is factored into smaller length cycles viz., 3-cycles and 2-cycles. The simpler cycles are then represented with the ternary reversible gates. The gate library such as Ternary Not gate, Multi-polarity Ternary Feynman Gate (\({\text {MPT}}_{\text {F}}\)) and Multi-polarity Ternary Toffoli Gate (\({\text {MPT}}_{\text {T}}\)) is used to synthesize 3-cycles and 2-cycles. These gates are then decomposed into elementary ternary quantum gates. The experimental evaluation indicates that there is an improvement in the present approach i.e 49 and 19% in terms of quantum cost and gate count as compared with the published works.