Abstract

Quantum-dot Cellular Automata (QCA), a promising alternative to the current CMOS technology, can be a viable solution of thousands of cores in a chip in near future due to its very high device density of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</sup> device/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and switching speeds of 10ps. On the other hand, the reversible logic is a promising computing paradigm in low power CMOS design, quantum computing, nanotechnology, and optical computing. Again, QCA consume low power which promises the energy efficient design of the logic circuits. However, the requirements of excessive logic gates and undesirable garbage outputs, while realising a function, limit the performance of a QCA based design. This work proposes a novel approach to synthesis a reversible universal QCA logic gate (RUG) structure with the target to reduce the garbage outputs as well as the logic gates of a design. This design addresses the fundamental issues of realizing reversible gates in nanotechnology and also its reliability and performance trade-off. The experimental designs establish that the RUG can ensure an energy saving, cost effective realization of QCA logic circuits that may not be possible with the conventional reversible logic gates.

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