Synchronous chip-to-chip communication with a multi-chip resonator clock distribution network *

Abstract

Superconducting digital circuits are a promising approach to build integrated systems with high energy-efficiency and computational density of the packaged chips. In such systems, performance of the data link between chips mounted on a multi-chip-module (MCM) is a critical driver of performance. In this work we report a synchronous data link using reciprocal quantum logic enabled by resonant clock distribution on-chip and on the MCM carrier. The simple physical link has only four Josephson junctions and 3 fJ/bit dissipation, including a 300 W/W cooling overhead. The driver produces a signal with 35 GHz analog bandwidth and connects to a single-ended receiver via 20 Ω Nb passive transmission line. To validate this link, we have designed, fabricated, and tested two 32 × 32 mm2 MCMs with eight 5 × 5 mm2 chips connected serially and powered by a traveling-wave clock, and with four 10 × 10 mm2 chips powered with a 2 GHz resonant clock. The traveling-wave clock MCM validates performance of the data link components and achieves a 5.4 dB AC bias margin with no degradation relative to individual chip tests. The resonator MCM validates synchronization between chips, with a measured AC bias margin up to 4.8 dB between two chips. The resonator MCM is capable of powering circuits of 4 million Josephson junctions across the four chips with a projected 10 Gbps serial data rate.