Abstract

Physically Unclonable Function (PUF) has become an indispensable on-chip security primitive for hardware security. Area and power efficient PUFs are required to sustain the future security of IoT platforms. In particular, emerging magneto-resistive STT-MRAM based PUF circuits have gained much attention as an alternative to software/pure CMOS PUF owing to their area and power efficiency. In this work, we propose a novel PUF extraction architecture and methodology that exploits the probabilistic switching behavior of STT-MRAM devices. We exploit spatial (device to device) as well as temporal (cycle to cycle) switching stochasticity of STT-MRAM devices in an array of 1T-1MTJ cells. We performed all simulations using 90 nm CMOS technology node, and 32 nm (diameter) perpendicular anisotropic magnetic tunnel junction (PMA-MTJ). The proposed PUF exhibits 45.83 % inter-hamming distance and ~ 5.0 % intra-hamming distance without post processing of the extracted bit pattern.

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