Switched-capacitor neural networks using pulse based arithmetic

Abstract

A possible VLSI implementation of a neural network using SC networks is presented. The frequency of a presynaptic pulse is used as a measure of its state, Vj(f). Synaptic multiplication is made possible by controlling input voltages to the SC multiplier and clock frequencies, Vj(f). Programmable positive and negative weights are allowed. The design is asynchronous and does not require any master clocks.