Abstract

One of the major area of interest of the electronics packaging industry is the formation of interconnects between the chips in a 3D package. Copper has been proven to be a suitable candidate for the conductive material in back-end-of-line due to its low electrical resistivity and high electro-migration resistance. Due to this favorable property of copper, it is also used to form microbumps and through silicon vias (TSVs) for 3D stacking. To stack known good dies (KGDs), die-to-die (D2D) and die-to-wafer (D2W) bonding are the traditional approaches used in 3D stacking. Flip chip thermo-compression bonding (TCB) is employed to enable a joint formation between the microbumps of the top chip and the bottom substrate. Most TCB tools are limited by pressure and temperature parameters. High temperature and pressure requirements make the bonding process costly and may cause additional reliability concerns. Good joint formation at low temperature and low pressure is preferred to address these issues for various applications. The aim of this paper is to explore different dry and wet cleaning approach to understand its effect on the copper surface and its effect to enable low temperature (250 °C) and low pressure (~23 MPa) bonding in a cleanroom environment without compromising the joint quality.

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