Abstract

Surface roughness that is an inherent character of deposited films determines contact resistance at layer interfaces and thus may play a critical role in write and readout operations of phase-change electrical probe memory comprising multiple stacked layers. The surface roughness of different layered components was therefore simulated and their impact on resulting temperature, write/read current, and bit size was evaluated. It was revealed that using capping layer with larger root-mean-square and denser roughness significantly decreases the temperature and write/read current, and therefore forms a written bit embedded inside the active layer, while surface roughness of active layer, bottom electrode, and substrate have a negligible effect on electro-thermal characteristic and phase-transformation extent of the probe memory. To trigger optimum readout current and exempt from tip wear, probe tip was suggested to penetrate into the capping layer by 0.2 nm for the densest roughness of 3 nm root-mean-square.

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