Suppression of Leakage Current in Solid-Phase Crystallization Silicon Thin-Film Transistors Employing Off-State-Bias Annealing

Abstract

We have fabricated p-channel metal oxide semiconductor (PMOS) solid-phase crystallization silicon (SPC-Si) thin-film transistors (TFTs) employing an alternating magnetic field on a glass substrate, which exhibit better current uniformity than excimer-laser annealed low-temperature polycrystalline silicon (ELA LTPS) TFTs, and superior stability to hydrogenated amorphous silicon (a-Si:H) TFTs. The leakage current of the SPC-Si TFT was larger than that of an a-Si:H TFT and an ELA poly-Si TFT owing to its many grain boundaries. The leakage current of the SPC-Si TFT was successfully suppressed through off-state-bias annealing. Off-state-bias annealing forced electron carriers to be trapped in the gate insulator, thus reducing the gate–drain field and suppressing the leakage current of the SPC-Si TFT. Our experimental result showed that the trapped electron charges in the gate insulator did not escape under thermal annealing or AC-bias stress. The off-state-bias annealed PMOS SPC-Si TFT could be a suitable pixel element for high-quality display applications employing an alternating magnetic field.