Superhigh energy storage density on-chip capacitors with ferroelectric Hf0.5Zr0.5O2/antiferroelectric Hf0.25Zr0.75O2 bilayer nanofilms fabricated by plasma-enhanced atomic layer deposition

Abstract

Thanks to their excellent compatibility with the complementary metal-oxide-semiconductor (CMOS) process, antiferroelectric (AFE) HfO2/ZrO2-based thin films have emerged as potential candidates for high-performance on-chip energy storage capacitors of miniaturized energy-autonomous systems. However, increasing the energy storage density (ESD) of capacitors has been a great challenge. In this work, we propose the fabrication of ferroelectric (FE) Hf0.5Zr0.5O2/AFE Hf0.25Zr0.75O2 bilayer nanofilms by plasma-enhanced atomic layer deposition for high ESD capacitors with TiN electrodes. The effects of the FE/AFE thickness composition and annealing conditions are investigated, revealing that the Hf0.5Zr0.5O2 (1 nm)/Hf0.25Zr0.75O2 (9 nm) bilayer can generate the optimal ESD after optimized annealing at 450 °C for 30 min. This is mainly ascribed to the factor that the introduction of a 1 nm Hf0.5Zr0.5O2 layer enhances the formation of the tetragonal (T) phase with antiferroelectricity in the AFE Hf0.25Zr0.75O2 layer as well as the breakdown electric field of the bilayer while fixing the FE/AFE bilayer thickness at 10 nm. As a result, a ESD as high as 71.95 J cm-3 can be obtained together with an energy storage efficiency (ESE) of 57.8%. Meanwhile, with increasing the measurement temperature from 300 and 425 K, the capacitor also demonstrates excellent stabilities of ESD and ESE. In addition, superior electrical cycling endurance is also demonstrated. Further, by integrating the capacitor into deep silicon trenches, a superhigh ESD of 364.1 J cm-3 is achieved together with an ESE of 56.5%. This work provides an effective way for developing CMOS process-compatible, eco-friendly and superhigh ESD three-dimensional capacitors for on-chip energy storage applications.