Abstract
This paper makes forward a technique called sub-threshold region and its implementation on the basic logic gates like inverter and NAND logic gate etc. The parameter like Power, Delay and Power-Delay Product of the basic gates has been computed. The result obtained shows the ultra-low power operation, the device is operated in sub-threshold region. All the simulations have been performed in CADENCDE Virtuoso Environment using gpdk 180 nm technology node and keeping the supply voltage at 0.2 V. Keywords: Sub-threshold; inverter; NAND; power; delay; power-delay product; ultra-low power Cite this article Vinay Kumar Pandey, Divakar Tamang, Angana Saikia, Sudip aul, Sub-threshold: A Design Technique For Ultra-Low Power Operation. Journal of Advanced Database Management & Systems . 2019; 6(1): 62–68p.
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