Substrate Temperature Dependence of Microcrystalline Silicon Thin Films by Combinatorial CVD Deposition

Abstract

A high-pressure depletion method using plasma chemical vapor deposition (CVD) is often used to deposit hydrogenated microcrystalline silicon (<TEX>${\mu}c-Si:H$</TEX>) films of a low defect density at a high deposition rate. To understand proper deposition conditions of <TEX>${\mu}c-Si:H$</TEX> films for a high-pressure depletion method, Si films were deposited in a combinatorial way using a multi-hollow discharge plasma CVD method. In this paper the substrate temperature dependence of <TEX>${\mu}c-Si:H$</TEX> film properties are demonstrated. The higher substrate temperature brings about the higher deposition rate, and the process window of device quality <TEX>${\mu}c-Si:H$</TEX> films becomes wider until <TEX>$200^{\circ}C$</TEX>. This is attributed to competitive reactions between Si etching by H atoms and Si deposition.