Substrate Noise Generation in Complex Digital Systems

Abstract

More and more system-on-chip designs require the integration of analog circuits on large digital ASICs and will therefore suffer from substrate noise coupling. Accurate modeling and simulation are needed to investigate the generation, propagation, and impact of substrate noise. Recent studies were limited to the time-domain behavior of generated substrate noise and to noise injection from a single noise source. This chapter focuses on substrate noise generation by real digital circuits on low-ohmic substrates and on the spectral content of this noise. To simulate the noise generation, a SPICE substrate model for heavily doped epi-type substrates has been used. The accuracy of this model has been verified with measurements of substrate noise on a small experimental ASIC, using a wide-band substrate noise sensor amplifier, which allows accurate measurement of the spectral content of substrate noise. A second, more complex experimental ASIC has been designed, an 86-Kgate digital multirate filterbank with several noise sensor amplifiers, to analyze substrate noise generation in a real digital telecom ASIC and to investigate the influence of the different substrate noise coupling mechanisms.