Substrate current characteristics in partially depleted silicon-on-insulator n-MOSFETs from room temperature down to 4.2 K

Abstract

This paper reports on the substrate current ( l B ) characteristics of partially depleted silicon-on-insulator (SOI) n-MOSFETs at 4.2, 77 and 300 K. It is demonstrated that, to a good approximation, the same model as for bulk MOSFETs can be used to describe the gate and drain voltage dependence of l B in SOI MOSFETs. The temperature dependence of the semi-empirical coefficients is discussed and the impact of the so-called twin-gate concept on l B is investigated.