Sub-micron GaInAs/InP hot electron transistors by EBL process and size dependence of current gain

Abstract

Sub-micron hot electron transistors (HETs) fabricated by electron beam lithography (EBL) and the size dependence of current gain in HETs are described. The key process to fabricate small HETs is the small opening of the polyimide layer by dry-etching with bi-layer (PMMA/LS-SOG) resist. In this etching, removal of scum by slight wet etching and release of stress are essential to make a small opening (160×350 nm 2). The smallest emitter size of fabricated HET was (0.3×1.5+0.6×1) μm 2 and a Gummel plot with a current gain of 4 was observed. This gain was almost the same as that of large HETs (20×50 μm 2). In comparison with previously fabricated small HETs with SiO 2 layer, small HETs with polyimide layer show higher current gain.