Submicrometer CMOS device fabrication using an X-ray stepper

Abstract

CMOS devices with submicrometer minimum features have been fabricated using X-ray/photo hybrid lithography. The device fabrication process utilized thirteen lithography steps, including four X-ray lithography levels, such as local oxidation of silicon (LOCOS) [1], gate, contact, and wiring, that required the most critical dimension control and alignment accuracy. A step and repeat exposure system and a SiN x membrane mask were used for the X-ray lithography process. The SiN x membrane mask was improved in its flatness and effective contrast by employing a stress compensating structure and a secondary electron trapping film. As a result, CMOS devices with 0.4-µm effective channel length were fabricated using a single-layer resist process.