Sub-Threshold Performance Assessment of Ultra-Thin Body InGaAs-on Insulator Negative Capacitance MOS Transistor

Abstract

In this work, with the help of 2-D device simulation and 1-D Landau-Khalatnikov model for ferroelectric material, we have studied the scaling effect of ferroelectric material as a gate dielectric on the sub-threshold characteristics of ultra-thin body on insulator MOS transistor. The device performance is investigated for the MOS device with high mobility III-V material (InGaAs) as a channel material and its performance is compared with silicon channel based MOS device. The negative capacitance characteristics of the dielectric material is modeled by charge-dependent 1-D L-K equation related to ferroelectric polarization model. With an increase in thickness of ferroelectric material, improvement in sub-threshold characteristics such as drain induced barrier lowering coefficient and sub-threshold swing is observed. At higher ferroelectric layer thickness, hysteresis effect in the device characteristics also observed. Internal gate voltage amplification found to be proportional with the thickness of ferroelectric region for both device. With optimum ferroelectric layer thickness, device with high mobility InGaAs channel shows significant improvement in electrostatic integrity which is comparable to silicon channel based MOS device.