Study on Thermal Stability of Plasma-PH[sub 3] Passivated HfAlO/In[sub 0.53]Ga[sub 0.47]As Gate Stack for Advanced Metal-Oxide-Semiconductor Field Effect Transistor

Abstract

In this work, we studied the thermal stability of a plasma-PH 3 passivated HfAIO/InGa 0.53 As 0.47 gate stack for high speed metal-oxide-semiconductor field effect transistor (MOSFET) application, and results show excellent thermal stability up to 800°C with negligible changes in the equivalent oxide thickness, interface trap densities (D it ), and subthreshold slope. An increase in leakage current (1.10 × 10- 4 A/cm 2 at Vg = 1.5 V) after 800°C anneal can be attributed to the localized thinning of the gate dielectric and the rough interface caused by the out-diffusion of Ga/As, as observed by transmission electron microscopy and energy dispersion X-ray analysis. D it measurement by the charge-trapping method showed suppressed D it at the upper half of the bandgap for plasma-PH 3 passivated devices, which is favorable for n-channel MOSFET operation.