Abstract

HW/SW (hardware/software) co-design method based on analysis and optimization of DFG (data flow graphic) model is introduced for SOPC (System on a Programmable Chip) used for digital instrument design in this paper. The method is based on the DFG model of the digital signal process algorithm and implemented with SOPC technology. The DFG model could help designer to divide the function into hardware and software respectively, therefore, the optimizing analysis at system level and circuit level of an SOPC used for portable logic analyzer shows that the DFG model is very useful for not only optimizing architecture and power consumption, but also HW/SW co-design. The DFG model method based on SOPC technology is described in detail in this paper.

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