Abstract

In this paper, the impact of vertical channel epilayer thickness (Tepi) of a unique U-TFET has been investigated in the RF domain along with its linearity aspect. Then, a glance has been thrown to the analog domain as well. The entire study has been carried out for the three low-power performance zones. After scrutinizing the linearity vs. analog/RF performance, it has been observed that the most enhanced device in the analog/RF domain is the worst performer with respect to the linearity aspect and vice-versa. This calls for optimization. The 6-nm-Tepi device turns out to be the one. Next, for the first time, a unique process-induced variation study in terms of the deviated Tepi from its optimized value has been introduced to find out the degree of sensitivity of different linearity parameters with respect to the deviation. Intriguingly, no single trend has been observed in terms of the dominance of linearity parameters for the said three zones – the result remains application specific.

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