Study on electrostatic discharge (ESD) reliability improvement of ZnO-based multilayered chip varistor(MLV)

Abstract

An improvement of electrostatic discharge (ESD) reliability in a ZnO-based multilayered chip varistor (MLV) has been studied using transmission electron microscopy (TEM), energy dispersive x-ray spectroscopy (EDX) and micro x-ray diffraction (XRD). A sample including a small amount of Si shows the remarkable improvement of ESD reliablility when compared to a sample fabricated without Si. It is found that the Si-added sample can withstand even under 25KV ESD. In order to understand this outstanding result, overall microstructure of a MLV is investigated by TEM. EDX line profiles in TEM reveal that the small amount of Si coexists with Bi-rich phase along grain boundaries (GBs). Results of high resolution (HR) TEM micrographs show that the crystalline phase in the triple points (TPs) is crystalline, whereas in the narrow GB regions the phase is amorphous. For understanding the phases in the TPs, the crystallography of BiOx phases is investigated by the micro-XRD in detail. From the micro-XRD measurement of a small size MLV (1.0 mm x 0.5 mm), the Bi 24 Si 2 O 40 (cubic, 123) and 6 -BiO 3 phases are detected as well as a main phase in a MLV, zincite (Sb-rich spinel structure). As a result, the Bi 24 Si 2 O 40 phase is likely to be the Bi-rich crystalline phase found in the TPs by TEM analysis, and also the phase partially contributes to the improvement of ESD resistance. The addition of the small amount of Si may cause the phase transition in the thin amorphous BiOx of the GBs during sintering process. Therefore, it can be concluded that the controlling of additive elements in a MLV results in a major effect of an improvement on the ESD reliability in a MLV.