Study of various high speed multipliers

Abstract

Multiplication or repeated addition is the basic operation used in both Mathematics and Science. The speed of multiplier determines the speed of all Digital Signal Processors. This paper describes four multipliers that is Modified Booth Multiplier, Vedic Multiplier (Urdhva Tiryakbhyam Sutra), Wallace Multiplier and Dadda Multiplier. In Modified Booth Multiplier Algorithm ‘0’ is appended to the right of LSB and then three bits starting from the LSB are grouped as a set to decide the partial product. So as to increase its speed, desk calculators are used that perform the operation of shifting faster. Urdhva Tiryakbhyam Sutra is performed by two multiplication techniques that is straight above multiplication and diagonal multiplication. Then finally, their sum is taken. Here reduction of multi bit multiplication to single bit multiplication takes place followed by the process of addition. Since there is only one step generation of partial product, carry propagation from LSB to MSB is reduced. There are three steps in which both Wallace and Dadda Multiplier work. They are partial product formation, reduction of partial products formed to two rows and addition of these two rows using carry propagation adder. Wallace Multiplier reduces all possible partial products and so has a smaller carry propagating adder whereas Dadda Multiplier performs only minimum necessary reduction and thus has a larger carry propagating adder. But as far as speed is concerned Dadda Multiplier is faster than Wallace Multiplier.