Abstract
The paper focuses on the peculiarities of charge trapping processes in non-volatile memory metal-oxide-silicon (MOS) capacitors with Si nanodots floating gate formed by LP CVD technology. Careful electrical studies of MOS structures based on analysis of the capacitance–voltage CV characteristics during pulse charge injection in the oxide enabled the distinguishing of the electron emission from nanodots and the charge trapping effects in the encircling dioxide matrix. Unipolar recharging phenomena in LP CVD structures is discussed on the basis of electron emission from the nanodots and their recharging under the high and low fields in the structure.
Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
