Study of the Effects of a Two-Step Anneal on the End of Range Defects in Silicon

Abstract

AbstractTransient enhanced diffusion (TED) is a challenge that the semi-conductor industry has been faced with for more than two decades. Numerous investigations have been conducted to better understand the mechanisms that govern this phenomenon, so that scale down can be acheived. {311} type defects and dislocation loops are known interstitial sources that drive TED and dopants such as B utilize these interstitials to diffuse throughout the Si lattice. It has been reported that a two-step anneal on Ge preamorphized Si with ultra-low energy B implants has resulted in shallower junction depths. This study examines whether the pre-anneal step has a measurable effect on the end of range defects. Si wafers were preamorphized with Ge at 10, 12, 15, 20 and 30keV at a dose of 1x1015cm-2 and subsequently implanted with 1x1015cm-2 1keV B. Furnace anneals were performed at 450, 550, 650 and 750°C; the samples were then subjected to a spike RTA at 950°C. The implant damage was analyzed using Quantitative Transmission Electron Microscopy (QTEM). At the low energy Ge preamorphization, little damage is observed. However at the higher energies the microstructure is populated with extended defects. The defects evolve into elongated loops as the preanneal temperature increases. Both the extended defect density and the trapped interstitial concentration peak at a preanneal temperature of 550°C, suggesting that this may be an optimal condition for trapping interstitials.