Abstract
In this work, the effect of gate doping and temperature is analyzed on breakdown voltages in 4H-SiC based vertical JFET. The physical model has a good agreement with wide range of temperatures showing that breakdown voltage indeed varies with temperature and the device exhibits negative temperature coefficient. Maximum breakdown voltage of 2133V is observed with doping concentration of 5×1018 cm-3 at room temperature, which is approximately same (2118V) when doping was 3 x 1018 cm-3 but 34% higher when doping was 1 x 1018 cm-3. Using finite element simulation, the distribution of electric field and impact ionization as a function of temperature and gate doping concentration is also analyzed. During the depth dependence electric field study results, it is clarified that punch through behavior at the interface of drift (n−) and drain (n+) region is prominent.
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