Abstract

QCA (quantum dot cellular automata) are projected as the replacement of state-of-the-art CMOS designs. The wide acceptance of QCA based design of logic circuits demands analysis and estimation of defect coverage in such circuits. Conventional single stuck-at fault model has been commonly employed to identify the majority of defects at the logic level. However, stuck-at fault model may not fully capture the defects in QCA based designs but approximates the defects in such designs. This work evaluates the effectiveness of such state-of-the-art VLSI test mechanisms, and investigates the possibility of more defect coverage through N-detectability in QCA designs. An experimental set up has been created to study the test quality of such designs subject to a PRPG (pseudo-random-pattern generator). The results shown in the paper point to the fact that the conventional test technique for CMOS designs is also effective in QCA based designs

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call