Study of Multicell Upsets in SRAM at a 5-nm Bulk FinFET Node

Abstract

Single-port and two-port SRAM designs in a 5-nm bulk FinFET node were tested for multi-cell upset (MCU) vulnerability against alpha particles, 14-MeV neutrons, thermal neutrons, and heavy ions with nominal and reduced supply voltages. Multi-cell upset contributions to single-event upset rates and observed bit-line upset ranges are presented for each particle as a function of supply voltage. Results show that MCUs account for a majority of events from high LET particles and neutrons at lower supply voltages. MCU shapes are shown for various sizes of upset clusters.