Abstract
Using a transient electrical model, in which the impacts of Si surface potential and thermal excitation were taken into account, the charging and discharging processes in a metal nanocrystal (NC) memory were simulated. For an NC memory with 2.25 nm tunnel oxide layer, the retention time is more than ten years, and the program and erase time can reach 45 and 60 μs at ±10 V applied voltage, respectively. Moreover, the carrier storage effect caused by NCs has great influence on capacitance-voltage (C-V) characteristics. The flat-band voltage shift ΔV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">FB</sub> and the charge density Q <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nc</sub> are greatly dependent on the start sweep gate voltage V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> and the sweep rate dV/dt. The large memory window reveals the high carrier injection efficiency for both electrons and holes, and it increases steadily from 0.86 to 8.30 V with the increase of the start applied gate voltage from ±2 to ± 6 V. When the sweep rate is slow enough, the flat-band voltage shift and the stored charges will reach a saturation state. Hence, the simulation C-V characteristics of metal NC memory may guide the devices design or to predict their performances.
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