Structural Dependence of Source-and-Drain Series Resistance on Saturation Drain Current for Sub-20 nm Metal–Oxide–Semiconductor Field-Effect Transistors

Abstract

The structural dependence of series-resistance effects on the saturation current is investigated in sub-20 nm metal–oxide–semiconductor field-effect transistors (MOSFETs). For planer bulk, silicon-on-insulator (SOI), and multi gate (MG) MOSFETs, the reduction rate of the saturation current is calculated using an analytical current model in high-performance (HP), low-operating-power (LOP), and low-standby-power (LSTP) technologies. In HP technology, the reduction rates are 29.0, 25.3, and 22.1% for bulk, SOI, and MG MOSFETs, respectively. In LOP technology, the reduction rates are 23.8, 21.5, and 20.7% for bulk, SOI, and MG MOSFETs, respectively. In LSTP technology, the reduction rates are about 17% for all devices. In HP technology, the ratio of the series resistance to the channel resistance is the dominant factor for the reduction rate. In LOP technology, the ratio of the over drive voltage to the supply voltage is the dominant factor. In LSTP technology, both the resistance and voltage ratios are the dominant factors.