Strain Quantification Analysis of Epitaxial SiGe on SOI by Nanobeam Diffraction (NBD)

Abstract

Strain engineering technology is now routinely integrated in the wafer fabrication process to increase the carrier mobility and improve the device performance. Measuring and controlling the strain in nanoscaled materials is a critical for developing the state-of-art semiconductor devices [1-2]. High-performance strain-engineered ETSOI devices have been reported, such as strained SOI (SSDOI) for NFET and SiGeon-insulator (SGOI) for PFET [3-4]. Characterization of strain within channel area is very important to understand integration and device performance. In this work, we investigate the strain distribution in two samples. One is 27 nm SiGe epitaxially grown on 7 nm ETSOI substrate. The other is 21nm SiGe epitaxially grown on 9nm ETSOI substrate, followed by thermal anneal to drive Ge into the underlying ETSOI layer to form a uniform SiGe layer. Fig.1 shows the schematic thermal mixing flow to form SiGe channel ETSOI. The strain in the original epi SiGe layer is transferred into SOI region and can be maintained after the thermal anneal process, which could be beneficial for device fabrication. Line scan of diffraction patterns perpendicular to the SiGe/ETSOI film stack were acquired and the reference diffraction pattern of unstrained Silicon was acquired from the bulk Si substrate below the buried oxide (BOX). The strain is then calculated by comparing the diffractions patterns acquired in the region of interest (e.g., SiGe) with a pattern acquired in a reference unstrained Si substrate Since the software uses Si lattice constant as reference, the lattice deformation profile is actually generated.