Abstract
Polar codes, the first class of codes achieving the capacity of symmetric binary-input discrete memoryless channels (B-DMCs), have drawn intensive attentions. For speed-insensitive applications, such as implantable devices, there is a good need on complexity and robustness. In this article, stochastic computing is introduced to allieviate the contradiction between complexity and performance for polar decoders. We proposed a stochastic belief propagation (BP) polar decoder and corresponding novel approaches to improve its decoding performance. Based on the understanding of stochastic computing correlation (SCC) in polar coding, the efficient stage-wise re-randomization scheme and its implementation are proposed and carefully analyzed. Hardware architectural optimizations and corresponding ASIC implementation are also given and demonstrate advantages over the state-of-the-art.
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