Statistical Analysis of Process Variations on the Delay-Based PUF

Abstract

Silicon physical unclonable function (PUF) is a special circuit that can reflect the uncontrollable intrinsic variation of integrated circuits (ICs) manufacturing process. These PUFs can be used as hardware security in security fields, such as authentication of devices and key generation in security applications. In order to know how the PUF circuits express the physical characteristics due to manufacturing process variations and provide a reference for researchers in the field of security, we briefly introduce the arbiter-based PUF and analyze the arbiter-based PUF in depth as it is a typical one of the silicon PUFs. Instead of paying attention to the whole PUF circuit which most studies do, we just focus on the stages so we can determine a demand of the arbiter. Monte Carlo simulation has been used to simulate the manufacturing process variations and the simulation is based on 40nm and 65nm technology libraries. Finally, a Monte Carlo-based statistical analysis has demonstrated that advanced technologies can enlarge intrinsic variation.