Abstract

This paper presents a new transformer based multilevel inverter, with a novel pulse width modulation scheme to achieve seven-level inverter output voltage. The proposed inverter switching pattern consists of three fundamental frequency sinusoidal reference signals with an offset value, and one high frequency triangular carrier signal. This switching scheme has been implemented using an 8-bit Xilinx SPARTAN-3E field programmable gate array based controller. In addition, the state space model of the proposed inverter is developed. The significant features of the proposed topology are: reduction of the power switch count and the gate drive power supply unit, the provision of a galvanic isolation between load and sources by a centre tap transformer. An exhaustive comparison has been made of the existing multilevel inverter topologies and the proposed topology. The performances of the proposed topology with resistive, resistive-inductive loads are simulated in a MATLAB environment and validated experimentally on a laboratory prototype.

Highlights

  • Multilevel inverters have been receiving increasing attention, because of their many features: it hasHow to cite this paper: Raj, R.G., Palani, S. and Sait, H.H. (2016) State Space Modeling and Implementation of a New Transformer Based Multilevel Inverter Topology with Reduced Switch Count

  • The flying Capacitor multilevel inverter requires more number of large size capacitors, thereby making it bigger in size and costlier, and the regulation of voltage in each capacitor is complicated with a single input DC source

  • The present work focuses on transformer based new multilevel inverter topology, which is composed of three isolated DC voltage sources, five power switches and one single phase centre tap transformer to generate sevenlevel output voltage

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Summary

Introduction

Multilevel inverters have been receiving increasing attention, because of their many features: it has. A single source cascaded transformers reduced switch multilevel inverter (CTRSI) has been presented in [17] It utilized eight power switches, three transformers with a single isolated dc voltage source, for making seven-level output voltage. A transformer based symmetrical and asymmetrical cascaded multilevel inverter has been proposed in [18] They utilize four bidirectional power switches, four unidirectional power switches and four transformers with a single input dc voltage source, for obtaining seven-level output voltage. The present work focuses on transformer based new multilevel inverter topology, which is composed of three isolated DC voltage sources, five power switches and one single phase centre tap transformer to generate sevenlevel output voltage.

Proposed Inverter Topology
Novel Switching Scheme for the Proposed Inverter
State Space Model of the Proposed Multilevel Inverter
Investigation of the Simulation and Experimental Results
Comparative Study
Conclusion
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