Abstract
As we enter the fourth wave of computing, advanced packaging becomes a key enabler of Moore's law scaling. Two of the key building blocks: 1D Under Bump Metallization and 2D Re-Distribution Layer (RDL) form critical interconnects in Fan-Out Wafer Level Packaging (FOWLP) which deliver benefits in power, performance, area, cost and time to market (PPACt). The use of polymeric materials in FOWLP give rise to several challenges for PVD, such as low temperature processing, warpage control and contact resistance. This work presents a state-of-the-art multi-chamber PVD platform capable of achieving >45% contact resistance reduction, and >30% productivity improvement over legacy PVD solutions without exceeding thermal budgets required.
Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
