STATE ENCODING OF FINITE STATE MACHINES FOR LOW POWER DESIGN

Abstract

We address the problem of state encoding for synchronous finite state machines (FSMs), targeted for low power design. Most previous work in FSM state encoding has been focused on minimizing chip area and does not consider switching activity of the circuit. As a result, this does not always lead to a power efficient implementation. Especially in CMOS circuits, the switching activity is a very important factor to power dissipation. In this work, we define a function λ for automatic tradeoff between switching activity and area that contribute to power dissipation. λ is used in determining the encoding affinity between states and is observed to be related to the number of states of an FSM in our experiments. A state encoding algorithm, based on hypercube embedding, is proposed to find encodings of states such that the sum of bit toggles between each pair of states times the encoding affinity between them is minimized. The proposed approach does not require any change in the functional specification of the state machine and can be easily incorporated in present design flow. Results over a wide range of MCNC benchmark examples which show the efficacy of our technique are presented. A simple function for λ is provided, and it is shown to be robust in finding low-power state encodings.