Abstract
Phase change memory (PCM) is being actively explored for in-memory computing and neuromorphic systems. The ability of a PCM device to store a continuum of resistance values can be exploited to realize arithmetic operations such as matrix-vector multiplications or to realize the synaptic efficacy in neural networks. However, the resistance variations arising from structural relaxation, 1/f noise, and changes in ambient temperature pose a key challenge. The recently proposed projected PCM concept helps to mitigate these resistance variations by decoupling the physical mechanism of resistance storage from the information-retrieval process. Even though the device concept has been proven successfully, a comprehensive understanding of the device behavior is still lacking. Here, we develop a device model that captures two key attributes, namely, resistance drift and the state dependence of resistance. The former refers to the temporal evolution of resistance, while the latter refers to the dependence of the device resistance on the phase configuration of the phase change material. The study provides significant insights into the role of interfacial resistance in these devices. The model is experimentally validated on projected PCM devices based on antimony and a metal nitride fabricated in a lateral device geometry and is also used to provide guidelines for material selection and device engineering.
Highlights
Phase change memory (PCM) is being actively explored for in-memory computing and neuromorphic systems
The atomic configuration of the non-equilibrium amorphous reset state created by melt-quenching relaxes structurally towards the meta-stable super-cooled liquid state[16,17,18]. This structural relaxation causes a drift of resistance which can be described by the expression, R = R0 ∗ (t/t0)vR, where R is the instantaneous device resistance at time t, R0 is the resistance at time t0 after the creation of the reset state, and vR is the drift coefficient
We have studied the key attributes of a projected phase change memory device, namely, the state dependence and the temporal evolution of resistance
Summary
Phase change memory (PCM) is being actively explored for in-memory computing and neuromorphic systems. In theory, this should enable reliable data storage across several multi-level states, a few challenges that are inherent to the amorphous state arise These include resistance drift[11,12] and electrical read noise, such as the 1/f and random telegraph noise[13,14,15] which induce temporal variations in the device resistance. Projected PCM devices have been shown to significantly reduce resistance drift and 1/f noise, by at least an order of magnitude, thereby enabling arithmetic operations with high precision[22] While these desired characteristics have been demonstrated through proof-of-concept memory devices, a comprehensive understanding of the device behavior is still lacking. Such models are crucial to both better understanding and building better performing projected PCM devices
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