Abstract

This paper demonstrates the implementation of a static random access memory (SRAM) cell that is suitable for low-voltage organic thin-film transistors (OTFTs). SRAM is an essential component in electronic systems which can store data or instructions for various applications. We use p-type OTFTs for the access transistors to gain higher areal efficiency and better robustness than those of conventional OTFT-based SRAM construction. We verify the stability of the proposed SRAM cell and optimize the transistor sizes through SPICE simulation. Using test chip measurement, the correct write/read operation of the proposed SRAM cell is confirmed under a 10× imbalance of the on-current ratio. The proposed SRAM cell achieves a 50% area reduction and a 2.5× static noise margin improvement, compared to the existing OTFT SRAM cell design.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call