Abstract

Temperature sensitivity of Si based rings can be nullified by the use of polymer over-cladding. Integration of athermal passive rings in an electronic-photonic architecture requires the possibility of multi-layer depositions with patterned structures. This requires establishing UV, thermal and plasma stability of the polymer during multi-layer stacking. UV stability is enhanced by UV curing to saturation levels. However, thermal stability is limited by the decomposition temperature of the polymer. Further, robust performance in oxidizing atmosphere and plasma exposure requires a SiO(2)/SiN(x) based dielectric coatings on the polymer. This communication uses a low temperature (130°C) High Density Plasma Chemical Vapor Deposition (HDPCVD) for dielectric encapsulation of polymer cladded Si rings to make them suitable for device layer deposition. UV induced cross-linking and annealing under vacuum make polymer robust and stable for Electron Cyclotron Resonance (ECR)-PECVD deposition of 500nm SiO(2)/SiN(x). The thermo-optic (TO) properties of the polymer cladded athermal rings do not change after dielectric cap deposition opening up possibilities of device deposition on top of the passive athermal rings. Back-end CMOS compatibility requires polymer materials with high decomposition temperature (> 400°C) that have low TO coefficients. This encourages the use of SiN(x) core waveguides in the back-end architecture for athermal applications.

Highlights

  • Si based ring resonators form an integral part of back-end photonic interconnect stack of an electronic-photonic integrated chip

  • Temperature sensitivity of Si based rings can be nullified by the use of polymer over-cladding

  • Integration of athermal passive rings in an electronic-photonic architecture requires the possibility of multi-layer depositions with patterned structures

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Summary

Introduction

Si based ring resonators form an integral part of back-end photonic interconnect stack of an electronic-photonic integrated chip. Back-end compatibility might require deposition of patterned structures on top of the polymer cladded athermal rings thereby requiring robust performance to plasma exposure and oxidation This communication explores the possibility of multi-layer stacking on these polymer cladded devices. The thermo-optic (TO) response of the encapsulated rings does not change after the dielectric deposition with a robust performance over an operating temperature range of 25°C125°C.Back-end-of-line (BEOL) compatibility requires polymers that have a high decomposition temperature (> 400°C) to ensure stability during the metal contact deposition. Such polymers have a low TO coefficient that might not negate the positive TO response of Si core. SiNx cores with a lower TO coefficient might be a better choice for athermal performance of CMOS compatible BEOL interconnects

UV Stability
HDPCVD of Dielectric Encapsulation
Performance of dielectric caps
Material Selection for CMOS BEOL compatibility: core-cladding combination
Summary and Conclusions
Full Text
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