Stability and Power Analysis of Schmitt Trigger Based Low Power SRAM Bit-Cell Using CMOS and CNTFET Technology at 22nm Technology Node

Abstract

SRAM (Static Random Access Memory) is an essential component of memory devices such as laptops, phones, etc., which act as a semiconductor memory. The “Carbon Nanotube Field Effect Transistor (CNTFET)” is silicon associated high-stability, low-power device with excellent performance. CNTFET has been verified to be very advantageous for Very large-scale integration circuit designs in the nanoscale range because of its remarkable properties of metal oxide semiconductor field effect transistor (MOSFET). The material was brought to light because of its genuinely incredible electrochemical performance. Carbon nanotubes have unique properties such as high charge carrier mobility, high voltage, small footprint, exceptionally short and high control over pulse duration, and large current densities. In traditional MOSFET, bulk silicon is used, which has high leakage current and high field-effect; thus, CNTFET has been used as an alternative in recent years. When compared to the 10T CNTFET SRAM Bit cell is designed using HSPICE Tool in 22nm technology. Long-term stability and significant process variable changes are significant challenges with nanoscale SRAM cells.