Abstract
A single-ended static memory scheme combining advantages of both a one-transistor dynamic RAM (DRAM) cell and a six-transistor static RAM (SRAM) cell is proposed in this article. For the first time, optical bias is introduced, converting the classical complementary metal-oxide semiconductor (CMOS) RAM to an optoelectronic device. The cell structure is highly scalable and cost effective. Various approaches and schemes were applied to combine advantages of static and dynamic RAM memories, striving to shorten access times, lower power dissipation, and decrease cell area. This is particularly true for system-on-a-chip (SoC) and embedded memories. Here, the novel approach towards the same goal is proposed and simulated, introducing standard CMOS technology. A single-ended, three-transistor, fully static RAM cell is demonstrated.
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