Abstract

With the rising requirements of computation efficiencies for artificial intelligence applications, the conventional deterministic computation approach has shown many bottlenecks in developing large scale deep learning algorithms. Especially for Bayesian inference problems with uncertainty and incompleteness, it usually requires many sampling operations which largely degrade the inference efficiencies. In this chapter, a spintronic devices based stochastic computing method is presented for efficient Bayesian inference. Stochastic computing is regarded as a promising approach to improve the area and energy efficiencies with simplified arithmetic operations. Spintronic devices are utilized to realize efficient sampling operations to overcome the inference efficiencies in terms of power, area and speed. The intrinsic randomness existing in switching process of spintronic device is exploited to realize stochastic number generator, which is the critical block for efficient circuit design of Bayesian inference. A device-to-architecture level framework is proposed to evaluate the promised performance of spintronic device based Bayesian inference system.

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