Specific features of silicon surface region fluorination by RIE in r.f. CF4 plasma – A novel method for improving the electrical properties of thin PECVD silicon oxide films

Abstract

► Comparison of fluorine plasma implantation methods have been performed. ► Classical PECVD and RIE reactors were used for ultra-shallow implantation. ► Observed changes were determined by ULE-SIMS and electrical ( C – V and I – V ) methods. ► PECVD SiO 2 was used as gate dielectric layer in MOS structures. ► Fluorination in RIE results in better electrical behavior of MOS structures. In this study, we compare a previously reported method of improving the electro-physical properties of silicon dioxide (SiO 2 ), which uses silicon substrate fluorination in CF 4 in a Plasma Enhanced Chemical Vapor Deposition (PECVD) reactor prior to oxide deposition, with our proposed method of fluorination in CF 4 in a classical Reactive Ion Etching (RIE) reactor. The careful analysis of the location and behavior of fluorine profile during PECVD gate oxide deposition was done by means of Ultra Low Energy-Secondary Ion Mass Spectroscopy (ULE-SIMS). The observed effects were used to determine changes in the electrical properties of the dielectric layers from the two fluorination methods being studied. The results showed that, in general, fluorination in a RIE reactor is superior to fluorination in a PECVD reactor. The advantage of the former technique is that most of the electro-physical properties of the resulting Metal–Oxide-Semiconductor (MOS) structures are significantly better. The change in the properties of gate stacks was shown to be fluorine concentration dependent, which can be controlled by the parameters of the RIE (e.g., by r.f. power supplied to the discharge). However, this study concluded that the fluorine profile parameters cannot be controlled independently.