Abstract
The tunneling field-effect transistor (T-FET) is considered a future transistor option due to its steep-slope prospects and the resulting advantages in operating at low supply voltage ( $V_{\mathrm {DD}}$ ). Reducing supply voltage while keeping a low leakage current and a reasonably high ON-current is critical for minimizing energy consumption and continue Moore’s law by helping with energy efficiency of computing. The thermal limit of the MOSFET transistor subthreshold swing (SS) restricts lowering its threshold voltage ( $V_{t}$ ), causing significant performance degradation at low $V_{\mathrm {DD}}$ . A T-FET’s SS is not limited by this thermal tail and may perform better at low $V_{\mathrm {DD}}$ .
Highlights
This Special Topic of the IEEE JOURNAL ON EXPLORATORY SOLID-STATE COMPUTATIONAL DEVICES AND CIRCUITS (JXCDC) called for the most recent developments for recent tunneling field-effect transistor (T-FET) device innovations and new ways of implementing its circuits for better energy-efficient computing
Reducing supply voltage while keeping a low leakage current and a reasonably high on-current is critical for minimizing energy consumption and continue Moore’s law by helping with energy efficiency of computing
Further progress in the T-FET fabrication process is needed for implementation in future semiconductor products
Summary
This Special Topic of the IEEE JOURNAL ON EXPLORATORY SOLID-STATE COMPUTATIONAL DEVICES AND CIRCUITS (JXCDC) called for the most recent developments for recent T-FET device innovations and new ways of implementing its circuits for better energy-efficient computing. T HE tunneling field-effect transistor (T-FET) is considered a future transistor option due to its steep-slope prospects and the resulting advantages in operating at low supply voltage (VDD). Reducing supply voltage while keeping a low leakage current and a reasonably high on-current is critical for minimizing energy consumption and continue Moore’s law by helping with energy efficiency of computing.
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