Abstract
The synaptic transistors with MXenes as floating gate and titania (TiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> ) as tunneling layer are prepared by a low-cost facile solution process. The devices exhibit typical synaptic behaviors of potentiation and depression by the gate voltage pulses. Moreover, through neuromorphic computing simulation, the transistors in this work show excellent recognition rate in the modified national institute of standards and technology (MNIST) database after 12,000 training states.
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