Solving Overlapping Pattern Issues in On-Chip Learning of Bio-Inspired Neuromorphic System with Synaptic Transistors

Hyungjin Kim,Byung-Gook Park

doi:10.3390/electronics9010013

Abstract

Recently, bio-inspired neuromorphic systems have been attracting widespread interest thanks to their energy-efficiency compared to conventional von Neumann architecture computing systems. Previously, we reported a silicon synaptic transistor with an asymmetric dual-gate structure for the direct connection between synaptic devices and neuron circuits. In this study, we study a hardware-based spiking neural network for pattern recognition using a binary modified National Institute of Standards and Technology (MNIST) dataset with a device model. A total of three systems were compared with regard to learning methods, and it was confirmed that the feature extraction of each pattern is the most crucial factor to avoiding overlapping pattern issues and obtaining a high pattern classification ability.

Highlights

Even though computing systems based on von Neumann architecture still dominate computer architecture, this architecture is considered inefficient for dealing with big data in the training of deep neural networks (DNNs) because of its serial signal processing [1]; a totally new computing system is required for the generation of artificial intelligence
With the help of the developed device model, the performance of the spiking neural network (SNN) composed of the synaptic transistors was studied with regard to pattern recognition
A 784 × 10 single-layer SNN was synaptic transistors was studied with regard to pattern recognition

Summary

Introduction

Even though computing systems based on von Neumann architecture still dominate computer architecture, this architecture is considered inefficient for dealing with big data in the training of deep neural networks (DNNs) because of its serial signal processing [1]; a totally new computing system is required for the generation of artificial intelligence. Transistor-based synaptic devices are considered as having better reliability characteristics and device variation for very-large-scale integration (VLSI) implementation of neural networks compared to their counterparts. The type and number of injected carriers are determined depending where α is a fitting coefficient. The type and number of injected carriers are determined depending on V G2 so that the amount of V T change (∆V T ) per each pre- and post-synaptic spike is calculated, on VG2 so that the amount of VT change (∆VT) per each pre- and post-synaptic spike is calculated, providing good agreement with the measured data [28].

Results and Discussion

Single-layer

Transferred

Conclusions