Solution to engineering problems of silicon-optical switches: reliability of co-package

Abstract

Based on the development trend of silicon-based optoelectronic technology and industry, and combined with the development status of microelectronic integrated circuits with feature sizes reduced to a few nanometers, as well as tightly surrounding high-speed, high-density, low-power interconnection and computing for the research of optoelectronic integration technology, this paper summarizes the solution of photonic integrated circuit (PIC) and electronic integrated circuit (EIC) Co-package integration through optoelectronic co-package technology. The Co-packaged solution takes full advantage of the mature technology of microelectronics and the interconnection speed of photonic technology, large bandwidth, anti-interference, high density and low power consumption. The reliability of the solder joints of the ball grid array (BGA) in the photoelectric Co-package under the conditions of sinusoidal vibration and thermal shock was studied by using the finite element method(FEM). Studies have shown that vibration loads acting on multiphase structures can cause stress concentration at the sharp corners of the boundary between two different materials. Shear loading will cause stress concentration at the corners of Cu6Sn5 layer under thermal shock conditions. The mean time to failure (MTTF) was predicted by using FEM to be 2166h, which is consistent with the actual. A systematic description of the reliability of highly integrated silicon-optical switches.From the point of data center networking and switch port, the reliability of silicon-optical switches is analyzed, and a solution to backup the failed port of silicon-optical switches is proposed.