Abstract
A CMOS solid-state photomultiplier (SSPM) coupled to a scintillation crystal uses an array of CMOS Geiger-mode avalanche photodiode (GPD) pixels to collect light and produce a signal proportional to the energy of the radiation. Each pixel acts as a binary photon detector, but the summed output is an analog representation of the total photon intensity. We have successfully fabricated arrays of GPD pixels in a CMOS environment, which makes possible the production of miniaturized arrays integrated with the detector electronics in a small silicon chip. In this work, we compare designs for the SSPM detector and present preliminary results in constructing a position-sensitive solid-state photomultiplier (PS-SSPM) using a commercially available CMOS process. The prototype arrays utilize a resistor network to provide a position-sensitive readout of the array. One pixel design achieves maximum detection efficiency for 632-nm photons approaching 20% with a room temperature dark count rate of less then 1 kHz for a 30-mum-diameter pixel. Pair-wise cross talk was measured to be less than 2% for 150 mum pixel spacing
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