Abstract

Gamma-ray detector technologies, capable of providing adequate energy information, use photomultiplier tubes (PMTs) or silicon avalanche photodiodes to detect the light pulse from a scintillation crystal. A new approach to detect the light from scintillation materials is to use an array of small photon counting detectors, or a “detector-on-a-chip” based on a novel “Solid-state Photomultiplier” (SSPM) concept. A CMOS SSPM coupled to a scintillation crystal uses an array of CMOS Geiger photodiode (GPD) pixels to collect light and produce a signal proportional to the energy of the radiation. Each pixel acts as a binary photon detector, but the summed output is an analog representation of the total photon intensity. We have successfully fabricated arrays of GPD pixels in a CMOS environment, which makes possible the production of miniaturized arrays integrated with the detector electronics in a small silicon chip. This detector technology allows for a substantial cost reduction while preserving the energy resolution needed for radiological measurements. In this work, we compare designs for the SSPM detector. One pixel design achieves maximum detection efficiency (DE) for 632-nm photons approaching 30% with a room temperature dark count rate (DCR) of less than 1 kHz for a 30-μm-diameter pixel. We characterize after pulsing and optical cross talk and discuss their effects on the performance of the SSPM. For 30-μm diameter, passively quenched CMOS GPD pixels, modeling suggests that a pixel spacing of approximately 90 μm optimizes the SSPM performance with respect to DE and cross talk.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call