Abstract
This work presents an analysis of SOI p- and nMuGFET devices with different TiN metal gate electrode thickness for rotated and standard structures. Thinner TiN metal gate allows achieving large gain in spite of the reduced variation observed of gm/IDS characteristics. This effect can be attributed to the increased Early voltage values observed for thinner TiN metal gate. Even with the lager mobility of the rotated nMuGFET devices when compared with the standard ones, the larger output conductance degradation resulted in an almost similar intrinsic voltage gain. p- Channel devices when implemented on the rotated layout offer a lower intrinsic voltage gain.
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