SOI LDMOSFET with Up and Down Extended Stepped Drift Region

Abstract

To increase the breakdown voltage and decrease the ON resistance, a silicon-on-insulator (SOI) lateral double-diffused metal–oxide–semiconductor field-effect transistor (LDMOSFET) in which the drift region extends to the up and down oxides in a step shape is proposed. This up and down extended stepped drift SOI (UDESD-SOI) structure demonstrates a modified lateral electric field distribution with additional peaks as well as a decrease of the usual peaks near the drain and gate. Two-dimensional (2D) simulations were used to compare the characteristics of the proposed UDESD-SOI structure with those of other structures, viz. down extended stepped drift SOI (DESD-SOI), up extended stepped drift SOI (UESD-SOI), and conventional SOI (C-SOI). Under the same conditions, the breakdown voltage of the UDESD-SOI structure was nearly 35%, 117%, and 318% higher compared with the DESD-SOI, UESD-SOI, and C-SOI structure, respectively. To determine the optimum parameters for the UDESD-SOI structure leading to the highest breakdown voltage, a comparative study was performed to investigate the effect of the doping concentration in the drift region, buried oxide (BOX) thickness, and thickness of up and down extended steps (T 1 and T 2, respectively). In addition, the drain current (ON resistance) of the UDESD-SOI structure was found to be 13%, 43%, and 229% higher (16%, 65%, and 257% lower) than the values for the DESD-SOI, UESD-SOI, and C-SOI structure, respectively.