Software in a Hardware View

Abstract

In current practices of SoC design a trend can be observed to integrate more and more low-level software components into the hardware at different levels of granularity. The implementation of important control functions is frequently shifted from the SoC’s hardware into its firmware. This calls for new methods for verification based on a joint analysis of hardware and software. While most techniques of software verification operate at a hardware-independent level, this chapter elaborates on the possible merits of a hardware-dependent software view. The chapter reviews a recently developed model for formal verification of low-level embedded system software called program netlist and details on its applications. In particular, applications for speed-independent and cycle-accurate hardware/software integration are reported. For each studied scenario, this chapter describes how the different challenges of modeling the hardware/software interface can be solved by exploiting the characteristics of the program netlist. For speed-independent hardware/software interaction the equivalence checking problem is studied and results of our proposed solution are presented. For the case of a cycle-accurate hardware/software integration, a model for hardware/software co-verification is developed and experimentally evaluated by applying it to property checking.